com.microsoft.MatMulNBits

com.microsoft · ONNX Runtime contrib operator · contrib since_version 1

Description

Matrix multiplication with B block-quantized along K and dequantized as (code - zero_point) * scale. Each power-of-two block_size group has a scale and optional zero point; optional bias is added afterward. Two-, four-, and eight-bit codes are packed low-first, and A may have rank 2 or 3. This package supports standard unpacked zero points with the same dtype as A. Deprecated g_idx, prepacked weights, and bfloat16 tensors are not implemented.

See the ONNX Runtime MatMulNBits contrib-operator spec for the reference semantics.

Inputs

Outputs

Attributes

Attributes and default values (overridable per request):

Type constraints

Implementation variants

One implementation is selected per call from the device capabilities, the request shapes and the dtypes; these notes say what each one covers.

• prefill_tiled_reg_vec4_splitk_default_zero — Splits the vec4 register-tiled K reduction across dispatch.z, then combines f32 partials and bias. Large 2-bit f16 tiles pin the narrowest subgroup width of a variable range under subgroup-size control; fixed 32-lane paths reuse each packed word, scale, and zero point across four vectors.
• prefill_tiled_reg_vec4_default_zero — Register-blocked prefill with vec4 activation loads. Taller inputs use 128-row tiles. Large 2-bit f16 grids pin the narrowest width of a variable subgroup range under size control, with BK=16 on 16–32 lanes; other tiers use BK=32. Deep 2-bit reductions on fixed 32-lane subgroups unpack four vectors per packed word and reuse its scale and zero point.
• prefill_tiled_reg_vec4_splitk_zero_bias — Splits the vec4 register-tiled K reduction across dispatch.z, then combines f32 partials and bias. Large 2-bit f16 tiles pin the narrowest subgroup width of a variable range under subgroup-size control; fixed 32-lane paths reuse each packed word, scale, and zero point across four vectors.
• prefill_tiled_reg_vec4_zero_bias — Register-blocked prefill with vec4 activation loads. Taller inputs use 128-row tiles. Large 2-bit f16 grids pin the narrowest width of a variable subgroup range under size control, with BK=16 on 16–32 lanes; other tiers use BK=32. Deep 2-bit reductions on fixed 32-lane subgroups unpack four vectors per packed word and reuse its scale and zero point.
• prefill_tiled_reg_vec4_splitk_zero_only — Splits the vec4 register-tiled K reduction across dispatch.z, then combines f32 partials and bias. Large 2-bit f16 tiles pin the narrowest subgroup width of a variable range under subgroup-size control; fixed 32-lane paths reuse each packed word, scale, and zero point across four vectors.
• prefill_tiled_reg_vec4_zero_only — Register-blocked prefill with vec4 activation loads. Taller inputs use 128-row tiles. Large 2-bit f16 grids pin the narrowest width of a variable subgroup range under size control, with BK=16 on 16–32 lanes; other tiers use BK=32. Deep 2-bit reductions on fixed 32-lane subgroups unpack four vectors per packed word and reuse its scale and zero point.
• prefill_tiled_reg_vec4_splitk_bias_only — Splits the vec4 register-tiled K reduction across dispatch.z, then combines f32 partials and bias. Large 2-bit f16 tiles pin the narrowest subgroup width of a variable range under subgroup-size control; fixed 32-lane paths reuse each packed word, scale, and zero point across four vectors.
• prefill_tiled_reg_vec4_bias_only — Register-blocked prefill with vec4 activation loads. Taller inputs use 128-row tiles. Large 2-bit f16 grids pin the narrowest width of a variable subgroup range under size control, with BK=16 on 16–32 lanes; other tiers use BK=32. Deep 2-bit reductions on fixed 32-lane subgroups unpack four vectors per packed word and reuse its scale and zero point.

Device requirements

Some implementation variants require subgroup-matrix and subgroups. These are route-specific capabilities, not package-wide requirements; availability also depends on the request shape and dtype.

Files

• metadata.json — kernel metadata (id, digests, per-variant templates, provenance)
• manifest.json — the op contract (source of truth)
• test.json — correctness cases
• bench.json — benchmark cases
• matmul-nbits-dp4a-quantize.wgsl.jinja
• matmul-nbits-gemv-q4.wgsl.jinja
• matmul-nbits-q4-dp4a-prefill.wgsl.jinja
• matmul-nbits-q4-prefill-tile4x4.wgsl.jinja
• matmul-nbits-q4-prefill-tiled-reg.wgsl.jinja
• matmul-nbits-q4-prefill-tiled.wgsl.jinja
• matmul-nbits-q4-sgmat.wgsl.jinja
• matmul-nbits.wgsl.jinja
• reduce-axis0-splitk-combine.wgsl.jinja

Use with @huggingface/kernels

npm install --save-exact @huggingface/kernels@0.0.1-preview.3

Required output shapes and logical data types are inferred from the supplied inputs and attributes; result tensors are allocated automatically.

The version: 1 option selects the published kernel contract; it is independent of any operator opset, contrib since_version, or model version. It follows the v1 branch as fixes land. To pin exact artifact bytes, pass a 40-character commit revision instead of version.

Replace each *Data placeholder with a typed array containing the corresponding input data.

import { getKernel } from "@huggingface/kernels";

const kernel = await getKernel("webgpu-kernels/com.microsoft.MatMulNBits", { version: 1 });
const { yT } = await kernel({
  aT: { data: aTData, shape: [2, 17] },
  bT: { data: bTData, shape: [2, 2, 8] },
  scalesT: { data: scalesTData, shape: [2, 2] },
}, {
  attrs: { K: 17, N: 2, block_size: 16 },
});